Blitz card viewer

⛔ AUDIT FAULT — fail-stop in force

🔌 CARD OFFLINE — not responding on the bus

Every register reads all-ones: the card is powered down, disabled, or being reprogrammed on the bench. Telemetry and audit evidence are suspended until it returns — this is a connectivity state, not an audit result.

HEALTHY

STATUS reads exactly 1

Card

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Substrate

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HW rev

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Serial

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Build

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ABI

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LIVE — streamed 20×/s from a real Ti375 FPGA on the bench in Vancouver.

bench offline — the live card will be back shortly

Throughput

odometer —

Power

µJ/sigcheck —

Temperature

Demo — sign & verify a message (the card is the verifier; signing is host-side)

private key (hex, demo-grade — a key born in a web page is public) message

Nexa/BCH Schnorr: e = H(r ‖ P_comp ‖ H(msg)) · s = k + e·d — edit ANY field below (or the message) after signing and the card must say FAIL

px py r s e

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Demo — load generator (real sigchecks to the card; watch the meters and the record path react)

target rate 0 sigchecks/s (log scale to 1M — past the card's bound on purpose: watch FLOW find the bottleneck) tamper 0% (corrupted s — the card must FAIL exactly these; a rubber stamp would PASS them)

idle

achieved —/s submitted — PASS — FAIL — UNKNOWN —

tip: crank the rate and watch the die temperature above climb — that's real silicon heating up. It cools again when you stop. This is not a simulation.

Record path

Counters — lifetime odometers

Fabric

in-flight — / —

latency —

core clocks — MHz fabric — MHz apb — MHz

empty — full — bottleneck —

STATUS — the health word

Control

viewer is read-only — the control path (pwrite: RESET strobe, flash window, SCRATCH) is stage 3; layout space reserved here.

Controller page — all registers (MEM-ABI v4 + spin amendments @ BAR0 0x0000)

addr	name	class	raw	decoded

Live view — real /dev/blitz/memN devices stream over SSE (4 Hz) via a Python poller on the blitz host lib; MockFeed scenarios remain in the picker for demo/offline use. Field inventory: blitz umbrella docs/MEM-ABI.md v4 incl. the 2026-08-02 amendments — except STATUS, which already shows the proposed spin-era relayout (2026-08-02, pre-ratification: present half [15:0] / since-power half [31:16], paired sticky = live + 16; reserved bits not rendered). Over-power (>8 W; M.2 budget 8.25 W) is also derived viewer-side on eras without the bit. High-water marks are viewer-tracked (since connect ≈ since PoR for a card that powered up watched); a card-side since-PoR peak would also need an ABI sitting.